Analog Devices HSC-ADC-EVALC Manual do Utilizador descarregar pdf (Página 23)

HSC-ADC-EVALC

Rev. 0 | Page 23 of 32

PCB LAYOUT

06676-019

GENERAL PURPOSE I/O,

USB/SPI CONTROL DATA BUS 1 DATA BUS 2

XILINX

VIRTEX-4

FPGA

DEBUG

PINS

EXTERNAL

SYNC I/O

CYPRESS USB

CONTROLLER

USB CONNECTOR FPGA JTAG

CONNECTOR

5VDC POWER

INPUT

FPGA LOAD

SELECT

ON BOARD

POWER SUPPLY

100MHz

OSCILLATOR

FPGA I/O

VOLTAGE MODE

FPGA CONFIG

PROM

Figure 19. Top Silkscreen

06676-020

Figure 20. Bottom Silkscreen

1 2 ... 18 19 20 21 22 23 24 25 26 27 28 ... 31 32

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